A high-speed bit stream interface module interfaces a high-speed
communication media to a communication Application Specific Integrated
Circuit (ASIC) via a Printed Circuit Board (PCB). The high-speed bit
stream interface includes a line side interface, a board side interface,
and a signal conditioning circuit. The signal conditioning circuit
services each of an RX path and a TX path and includes a limiting
amplifier and a clock and data recovery circuit. The signal conditioning
circuit may also include an equalizer and/or an output pre-emphasis
circuit. The limiting amplifier applies respective gains to the RX path
and to the TX path that are based upon respective dynamic ranges of the
incoming signals.