The processing quantity of each description part is estimated through a
source code analysis of a system operation description language or through
simulation, or power consumption of each function is estimated through an
operation description analysis of functions. Predetermined threshold
values are set with respect to the processing quantity and the power
consumption of each description part or function, so as to determine S/W
and H/W implementation, and then, S/W and H/W partitioning is carried out.
Thereafter, it is determined whether or not the total processing quantity
or the total power consumption satisfies a desired design condition. Also,
the S/W and H/W partitioning can be adjusted again in comprehensive
consideration of the power consumption and the processing quantity, and
the accuracy in the S/W and H/W partitioning can be improved by providing
an instruction set simulator with a function to analyze power consumption.
Moreover, an interface between S/W and H/W can be generated in the S/W and
H/W partitioning so as to be automatically inserted into a S/W implemented
part or a H/W implemented part.