A register renaming technique for dynamic multithreading. One disclosed
embodiment includes a register map to store up to M.times.N values to map
M registers for N threads. A set of N values, one per thread, and a set
of state bits is associated with each of the M registers. Each set of
state bits indicates which of the N values per register are valid and
whether ones of the N sets of values have been written by a dynamic
execution thread. In response to termination of a dynamic execution
thread, recovery logic may update state bits associated with ones of the
M registers that were written to during dynamic execution.