A design support apparatus includes a unit that inputs a user net list
created by using hard macro cells excluding test circuits, and a unit
that arranges hard macro cells using a frame into which hard macro cells,
where timing-converged physical information includes test terminals, and
test circuits are embedded as arrangement/wiring information. Moreover,
includes a unit that arranges and wires the test circuits using the
arrangement/wiring information of the test circuit embedded into the
frame, a unit that recognizes arrangement/wiring information where the
arrangement/wiring information of the test circuits is removed from
arrangement/wiring information obtained by wiring, and a unit outputs a
net list of a logic structure.