An efficient, cost effective method and apparatus for performing resource allocation of available bit rate (ABR) virtual circuit (VC) in an asynchronous transfer mode (ATM) network includes an explicit rate switch process performed at at least one switch of an ABR VC. The process provides a fast and more accurate computation of the number of active VCs in an ATM network. Furthermore, the fair share allocation is calculated at the switch in a way that is efficient and lends itself easily to implementation in hardware. For example, in one embodiment, the fair share is implemented using a series of counters and registers controlled by a state machine. This simple hardware implementation enables fast convergence to a current final state so that timely accurate resource utilization and allocation to the ABR VCs can be determined.