A via is formed in a semiconductor device using a self-aligned copper-based pillar to connect upper and lower copper interconnect layers separated by a dielectric. The lower interconnect layer is formed on an underlying layer. The copper-based via pillar is formed on the lower interconnect layer. The upper interconnect layer is formed to make electrical contact to the exposed upper surface of the via pillar. Conductive diffusion barrier material is formed on vertical sidewalls of the lower interconnect layer.