A supervisory circuit for a semiconductor integrated circuit includes a first circuit, a second circuit, inverters, and an EXOR circuit. The first circuit outputs an address signal. The second circuit receives via an address bus the address signal transferred from the first circuit. The inverters hold at least an address signal preceding one transfer period as a past address signal on the address bus. The EXOR circuit compares the past address signal held by the inverters with a current address signal on the address bus, and when the comparison result represents that the past and current address signals are identical, outputs an illicit operation detection signal.