In a method and system for the automated construction and manipulation of a physical integrated circuit layout of a multiple-gate semiconductor device, wherein the layout is comprised of a plurality of gate glue-blocks interconnected by a plurality of active-layer glue-blocks, working shapes of the gate glue-blocks are initially created according to user-defined gate glue-block parameters. Thereafter, working shapes of the active-layer glue-blocks are created in accordance with the working shapes of adjacent ones of the gate glue-blocks, in which the distances among the working shapes exceed minimum geometrical distances as defined by relevant design rules of an applied fabrication technology.