A method and system for diagnosing open defects in logic circuits. The method employs a pair of diagnostic fault models and an associated algorithm to automate the diagnoses of open defects--defects that cause interconnects to be open or high resistance in logic. The two diagnostic fault models, the net and node models, are used to predict potential logic errors that could be caused at the outputs of a logic circuit in the presence of an open defect on any interconnect under consideration in the logic circuit. The predicted errors are combined to form a diagnostic signature set corresponding to the logic circuit. The diagnostic signature set is then compared with a set of errors observed during testing using a diagnostic matching algorithm that ranks the presence of open defects on all interconnects under consideration in the circuit.