A ferroelectric memory cell includes a ferroelectric capacitor including a bottom electrode, a ferroelectric layer formed on the bottom electrode and a top electrode formed on the ferroelectric layer, a high permittivity dielectric layer formed over the ferroelectric capacitor, wherein the high permittivity dielectric layer includes an encapsulation layer and completely covers the top electrode, and a local interconnect electrode formed on the encapsulation layer.

 
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< Ferroelectric memory with bit-plate parallel architecture and operating method thereof

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> Primary radiator, phase shifter, and beam scanning antenna

> Liquid crystal display device having electric field in areas with a control window formed thereon

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