The invention is a digital signal processor architecture that is designed to speed up frequently-used signal processing computations, such as FIR filters, correlations, FFTs, and DFTs. The architecture uses a coupled dual-MAC architecture (MAC1), (MAC2) and attaches a dual-MAC coprocessor (MAC3), (MAC4) onto it in a unique way to achieve a significant increase in processing capability.

Вымыслом будет зодчество обработчика цифрового сигнала конструировано для того чтобы speed up част-ispol6zuemye вычисления обработки сигнала, such as фильтры FIR, корреляции, FFTs, и DFTs. Зодчество использует соединенное зодчество двойн-Makintowa (MAC1), (MAC2) и attaches coprocessor двойн-Makintowa (MAC3), (MAC4) на его в уникально дороге достигнуть значительно увеличения в возмоности обработки.
 
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