When compiling software for a processor that supports predication, an alerting instruction can be inserted to alert a global register allocator to map particular virtual predicates into the same physical registers. Redundant predicate generating instructions are removed from the resulting program. The alerting instruction can be a predicate copy pseudo-opcode. When the register allocator maps the virtual predicates into the same physical register, the predicate copy pseudo-opcode is removed. When the register allocator does not map the virtual predicates to the same physical register, the predicate copy pseudo-opcode is replaced by an instruction that will perform a predicate copy.