System and method for converting a selected signal into a timing signal and inserting the phase of the timing signal into a framed signal

   
   

A system for generating a timing signal is disclosed. A processor generates a selection command. A clock receives a signal selected in response to the selection command and converts the selected signal to a timing signal. A framing module inserts a phase of the timing signal into a framed signal. A method for generating a timing signal for a telecommunication system is disclosed. A selection command is generated using a processor. A signal is selected in response to the selection command. The selected signal is converted to a timing signal using a clock. A phase of the timing signal is inserted into a framed signal using a framing module.

 
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