A fundamental building block of 2-level series-gated CML-based CMOS circuit
which includes a number of inductive components for an electronic circuit
system is disclosed that is capable of driving a significant level of
external capacitive load at a high input clock frequency while providing a
high level of output signal fidelity for optical data communication. The
inductive components can be implemented as either separate inductors or as
differentially coupled pairs forming a corresponding transformer element.
The value of any particular inductive component is first selected to
approximately resonate, at the desired output signal frequency, with its
associated equivalent node capacitance but further adjusted to a final
value that results in a minimum output waveform distortion for the
particular application. Two exemplary cases of application, a Divide-by-2
counter and a Master Slave D-type Flip Flop are presented with associated
time domain output waveforms.
