A trace array for recording states of signals includes N-storage locations
for k trace signals. In the write mode, an address generator combines the
outputs of an event signal counter and a cycle clock counter to generate
trace array addresses. A start code is written each time an event signal
occurs and event addresses are saved. Recording is stopped by a stop
signal and the stop address is saved. A compression code and time stamp
code are written when no state changes occur in any trace signals at the
cycle clock times to compress recorded trace signal data. An output
processor reads out stored states of the trace signals and uses the start
codes, event addresses, stop address, compression code and time stamp to
reconstruct the original trace signal sequences for analysis.
