The invention relates to a buffer circuit for a load (LAS) to be supplied
by the supply DC voltage (U.sub.v), comprising a buffer capacitor (Cp),
which may be charged to a voltage (U.sub.H) by means of a charging circuit
(HSS). Said voltage is higher than the supply voltage and may be brought
in for supply of the load by means of a step-down controller (TSS). An
input of a step-down controller (TSS) is connected to the buffer capacitor
(C.sub.p) and the output thereof to the load (LAS), whereby a trigger
circuit (TRI) is provided to activate the step-down controller on drop-out
of the voltage (U.sub.v) at the load.
