A TEG (Test Element Group) block 1 includes a TFT (Thin Film Transistor)
test element and a capacitance test element that are arranged adjacent to
each other, and six test terminals. A TEG block 2 includes a resistance
test element and a capacitance test element that are arranged adjacent to
each other, and six test terminals. In these TEG blocks, the test
terminals are arranged with the same pattern. Each of the test elements in
each TEG block is connected to at least one of a plurality of test
terminals included in that TEG block.
The test elements can be efficiently formed on the substrate in view of the
space on a display device substrate or the preference of characteristics
to be evaluated. Moreover, characteristics of each test element can be
conducted with a common probe regardless of the type of display device.
