Communication packet processor with a look-up engine and content-addressable memory for modifying selectors to retrieve context information for a core processor

   
   

Packet processing circuitry comprises a processor and a look-up engine. The look-up engine transfers a first selector to a CAM and receives a corresponding first result from the CAM. The look-up engine generates a second selector based on the first result. The look-up engine transfers the second selector to the CAM and receives a corresponding second result from the CAM. The look-up engine retrieves a first context structure based on the second result. The look-up engine builds a summation block using the first context structure and transfers the summation block to the processor. The processor receives and processes the summation block to control handling of the communication packet.

El paquete que procesa el trazado de circuito abarca un procesador y un motor del look-up. El motor del look-up transfiere un primer selector a una LEVA y recibe un primer resultado correspondiente de la LEVA. El motor del look-up genera un segundo selector basado en el primer resultado. El motor del look-up transfiere el segundo selector a la LEVA y recibe un segundo resultado correspondiente de la LEVA. El motor del look-up recupera una primera estructura del contexto basada en el segundo resultado. El motor del look-up construye un bloque de la adición usando la primera estructura del contexto y transfiere el bloque de la adición al procesador. El procesador recibe y procesa el bloque de la adición para controlar la dirección del paquete de la comunicación.

 
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