A packet handler includes an interface circuit of an ATM handler
corresponding in one-to-one relation to each input/output port of an ATM
switch. A switch interface including a disconnection circuit and a
distribution circuit controls the cell flow from each interface circuit to
a corresponding input port and the cell from the output ports of the ATM
switch to each interface circuit. In a pet of interface circuits, one
redundant transmission path can be replaced arbitrarily with two
nonredundant independent transmission paths. The ATM communication system
can thus accommodate redundant transmission paths and nonredundant
transmission paths in an arbitrary ratio.
