A system for testing semiconductor components contained on a substrate,
such as a wafer, a panel, a leadframe or a module, includes an
interconnect configured to electrically engage all of the components on
the substrate at the same time. The interconnect includes a switching
network configured to selectively apply test signals to selected
components, to electrically isolate defective components and to transmit
test signals from selected groups of components. The system also includes
a test apparatus, such as a wafer prober or a carrier for handling the
substrate. A method for testing includes the steps of providing the
interconnect having the switching network, and controlling test signals to
the components using the switching network to perform various test
procedures, such as functionality tests, parametric tests and burn-in
tests.
