A single host adapter hardware I/O control block contains information used
to specify a transfer of data from a host system to a first target device
and in addition information that specifies whether the data is to be
mirrored, and if so, optionally identifies a second target device on which
the data is to be mirrored. After transferring the single hardware I/O
control block to the host adapter integrated circuit, the host adapter
integrated circuit determines whether the hardware I/O control block
specifies a mirrored transaction. If a mirrored transaction is specified,
the host adapter integrated circuit generates a second hardware I/O
control block for the second target device using the information in the
first hardware I/O control block. When the execution of both hardware I/O
control blocks is complete, the host adapter integrated circuit provides a
single completion notification to the host system.
