An ESD protection circuit (81) and a method for providing ESD protection is
provided. In some embodiments, an N-channel transistor (24), which can be
ESD damaged, is selectively turned on and made conducting. The purpose of
turning on the N-channel transistor (24) is to maximize the Vt1 of the
N-channel transistor (24). Vt1 is the drain-to-source voltage point at
which the parasitic bipolar action of the N-channel transistor (24) first
occurs. In some embodiments, the ESD protection circuit (81) includes a
diode (64) which provides an additional current path from the I/O pad 31
to a first power supply node (76).
