A method and apparatus for input/output virtual address translation and validation
assigns a range of memory to a device driver for its exclusive use. The device
driver invokes system functionality for receiving a logical address and outputting
a physical address having a length greater than the logical address. Another feature
of the invention is a computer system providing input/output virtual address translation
and validation for at least one peripheral device. In one embodiment, the computer
system includes a scatter-gather table, an input/output virtual address cache memory
associated with at least one peripheral device, and at least one device driver.
In a further embodiment, the input/output virtual address cache memory includes
an address validation cache and an address translation cache.
