Semiconductor integrated circuit device having connection pads for superposing expansion memory

   
   

An IC has pads provided on the conductors that are connected to the input/output terminals of a memory block thereof so as to allow the input/output pads of an external memory chip to be connected to the pads of the IC. By superposing the memory chip on the IC with their pads mutually connected, expansion of memory is achieved without increasing the chip size. The IC has a control circuit for determining whether to use the memory block or the memory chip so as to allow switching between them as required.

 
Web www.patentalert.com

< Memory device system and method for copying data in memory device system

< Method and apparatus for virtual address translation

> Method and apparatus for resuming memory operations from a low latency wake-up low power state

> Context-sensitive caching

~ 00176