The present invention is a method, system, and product for optimizing timing
in a circuit after layout of the circuit has been completed. The circuit includes
at least one variable delay line and includes coupled endpoint devices. The variable
delay line includes multiple, different selectable settings. A current setting
of the variable delay line is varied from a maximum setting to a minimum setting.
A timing accuracy indicator of a combination of the coupled endpoint devices is
determined as the variable delay line is varied from its maximum setting to its
minimum setting. Thus, multiple timing accuracy indicators are determined where
an indicator is determined for and associated with each one of the settings from
the maximum setting to the minimum setting. An optimum one of the selectable settings
is determined utilizing the timing accuracy indicators, wherein the optimum one
of the settings is associated with an optimum one of the multiple timing accuracy indicators.
