A synchronous semiconductor memory device includes a plurality of memory banks
which read data from memory cells and write data into the memory cells, a command
decoder circuit which receives a command, detects whether the command is a read
command or a write command, and, when detecting a read command or a write command,
outputs a first control signal that enables a read operation or a write operation
in the plurality of memory banks, bank select circuits which activate a second
control signal to activate each of the memory banks, and bank timer circuits which
deactivate the activated second control signal and perform control in such a manner
that the timing with which the second control signal is deactivated in a test mode
differs from that in a normal mode.
