Cache memory systems, microprocessors, and computer systems, as well as methods
of operating a cache memory system are described. The cache memory system includes
a cache memory controller coupled to a dynamic cache memory and a static cache
memory. The cache memory system provides the advantages of using dynamic memory
(having a small circuit real estate requirement) for cache read operations, and
static memory for cache write operations. Using the static memory for cache write
operations allows the cache memory system to function as a write-back cache, instead
of an instruction-only, or write-through cache.
