In the manufacture of an integrated circuit memory cell, a strontium bismuth
tantalate
or strontium bismuth tantalum niobate thin film layer (50) is deposited
on a substrate (28, 49) and a carefully controlled UV baking process is
performed on the strontium bismuth tantalate layer (50) prior to the deposition
of an ultra-thin bismuth tantalate layer (51). A second electrode (52)
is formed on top of the ultra-thin bismuth tantalate layer (51).
