A distributor and a search controller are added to the memory. A search is performed
with an algorithm such as quick search by repeating reading of memory cells, comparing
of the reading result, and narrowing down of entries to be compared based on the
comparison result. Performing this sequential processing in the memory provides
valid data in a bus time plus about half of a cycle time required in repeating
reading a conventional memory. Then, the latter half of the cycle time can be used
for comparison, as well as generation of the next memory cell address, so that
the search can be finished in a bus time multiplied by the number of repetitions
of reading the memory cells plus one bus time. As a result, a CAM function can
be achieved that allows for more than tens of thousands of entry data items, the
number of which is equal to the size of DRAM divided by the number of banks, rather
than hundreds or thousands of entry data items as conventional CAM.
