A circuit and method of generating an internal chip clock signal for distribution
throughout an integrated circuit in response to an external clock signal includes
the steps of generating a minimum width internal clock signal if the width of the
external clock signal is less than a predetermined minimum width, generating an
internal clock signal having a width substantially equal to the width of the external
clock signal if the width of the external clock signal is greater than a predetermined
minimum width but less than a predetermined maximum width, and generating a maximum
width internal clock signal if the width of the external clock signal is greater
than a predetermined maximum width.
