A printed wiring board, particularly, an interposer 20 for a chip scale
package, comprising an outer insulator layer 22 having outer electrodes
31, a conductor layer 21, and an inner insulator layer 23 having
inner electrodes 27, the electrodes 31 and/or 27 having been
formed by electroplating using, as a negative electrode, a metal plate 32 that
has been provided on the outer insulator layer 22 and removed after the
electroplating. Having no plating leads, the printed wiring board has the electrodes
in an orderly array at a fine pitch and a high density.
