An integrated graphics pipeline system is provided for graphics processing. Such
system includes a tessellation module that is positioned on a single semiconductor
platform for receiving data for tessellation purposes. Tessellation refers to the
process of decomposing either a complex surface such as a sphere or surface patch
into simpler primitives such as triangles or quadrilaterals, or a triangle into
multiple smaller triangles. Also included on the single semiconductor platform
is a transform module adapted to transform the tessellated data from a first space
to a second space. Coupled to the transform module is a lighting module which is
positioned on the single semiconductor platform for performing lighting operations
on the data received from the transform module. Also included is a rasterizer coupled
to the lighting module and positioned on the single semiconductor platform for
rendering the data received from the lighting module.
