Device jointly implementing a post-processing and a decoding of data

   
   

The present invention relates to a device for processing blocks of coded data included in a sequence of coded digital images (ES) according to a block-based coding technique, said device comprising a post-processing circuit DFD (33). Such a device effectively corrects the blocking artifacts while minimizing the bandwidth used, the decoder directly transmitting decoded data blocks (B) to the post-processing circuit. In addition, such a device introduces no or little drift during the decoding since the decoder continues to use reference images (RB) during a motion compensation step. This is because the reference images are no longer the decoded images but the completely processed images as the post-processing circuit is situated in the decoding loop.

 
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