A signal processor performs error correction on data which has been subjected
to
predetermined signal processing, for each predetermined block unit, by an error
correction block, in parallel with an operation of sequentially storing the data
in a cache memory. Then, error detection is performed on the data for each predetermined
block unit by a descrambling/error detection block, and the data is stored in a
buffer memory. Based on the results of the error detection and the error correction,
when there exists some error in the data, the data with the error, which is stored
in the buffer memory, is read out to be subjected to error correction again. When
there is no error, the data corresponding to one block and stored in the buffer
memory is transmitted to a host computer without performing error correction again.
