A picture processing apparatus is composed of a plurality of picture processing
systems. Each picture processing system includes an identical picture processing
IC (integrated circuit) and a plurality of memories each capable of memorizing
a picture frame and including at least two memories operating at different timings.
The picture processing IC includes a picture processing unit, an operation timing
signal generator, a plurality of control timing signal generators for controlling
different memories, and a memory control signal selection circuit for selectively
outputting one of at least two memory control timing signals. As a result, the
number of output pins of each picture processing IC for outputting memory control
signal can be reduced, whereby the picture processing apparatus can be produced
at a lower cost while retaining an identically large size of the picture processing ICs.
