Semiconductor memory device and test method thereof

   
   

A semiconductor memory device disclosed herein comprises: a memory cell array divided into a plurality of blocks, each of which includes a plurality of memory cells; a plurality of row decoders which correspond to the blocks, each of the row decoders including an access information holder configured to hold access information indicating whether its corresponding row decoder has been accessed; and an access information reader configured to read the access information held in the access information holders.

 
Web www.patentalert.com

< Light-emitting element controller, optical transmitting apparatus, and method and computer program for determining driving current

< Method and system for supplying high purity fluid

> System and method for providing a persistent object framework for managing persistent objects

> Casing patching tool

~ 00191