A programmable logic device includes a plurality of logic blocks. Each logic
block
includes a plurality of macrocells, with each macrocell being configurable to register
a sum of product term output. In addition, the macrocells within each logic block
are arranged from a first macrocell to a last macrocell. Each macrocell is associated
with a carry-in and a carry-out signal. The macrocells are configured to support
a carry cascade such that the carry-out signal from the first macrocell becomes
the carry-in signal for the second macrocell, and so on.
