A semiconductor memory device is capable of simultaneously reading data and refreshing
data and checking whether a data restoring function is operating normally. A data
inputting circuit receives data inputted from an external circuit. A parity generating
circuit generates parity data from the data input from the data inputting circuit.
A memory stores the data input from the data inputting circuit and the parity data
generated by the parity generating circuit. A refreshing circuit refreshes the
memory. A reading circuit reads the data from the memory. A restoring circuit restores
data to be refreshed by the refreshing circuit from other data read normally and
corresponding parity data, while the reading circuit is reading data. A data outputting
circuit outputs the data read by the reading circuit and the data restored by the
restoring circuit. A parity outputting circuit directly reads and outputs the parity
data stored in the memory.
