A system and method for automating a static-timing analysis of an integrated
circuit
design are provided. A representative system includes a network coupled to a plurality
of data storage devices, the data storage devices containing a knowledge base that
defines an integrated circuit design; a computer coupled to the network, the computer
including logic for receiving information defining an integrated circuit representation
from the plurality of data storage devices; and a memory element associated with
the computer, the memory element configured to store logic, the logic configured
to generate static-timing scripts that reflect a plurality of timing models. A
representative method includes the following steps: acquiring circuit information,
the circuit information comprising a plurality of functional blocks; identifying
a timing model to apply to each of the plurality of functional blocks; defining
the hierarchical relationships between each of the plurality of functional blocks;
extracting the circuit information responsive to the identifying and defining steps
to complete a simulation of each of the plurality of functional blocks; and forwarding
the simulation to a static-timing engine.
