A data processing device (1) which includes a circuit (2) with
data
processing means (17) which are suitable for processing data (DA) while
utilizing a characteristic value (CV) and with sequencing means (15) which
are arranged to execute an algorithm in order to control the data processing means
(17) in conformity with this algorithm which comprises a given number N
of sub-algorithms containing identical successions of algorithm steps, is additionally
provided with order fixation means (29) which co-operate with the sequencing
means (15) and whereby, each time when the algorithm is executed, an order
can be fixed from a plurality of feasible orders for the execution of the N sub-algorithms.
