A non-volatile memory, an SRAM, a DRAM and a control circuit are module-formed
into a single packaged. The control circuit assigns addresses to the SRAM and addresses
to the DRAM and data necessary to be held for a long period of time is saved in
the SRAM. Two chips of DRAM are mapped to the same address space and refreshed
alternately. The plural chips are arranged such that they are mutually laminated,
and they are wired by means of a BGA or inter-chip bonding.
