Digital circuitry is tested through effecting a paired data loop-back from
a first buffered output to a first buffered input whilst within the circuitry executing
at least part of the test through using a Built-In-Self-Test methodology. In particular,
the loop-back is effected from the first buffered data output to a buffered control
input, from a buffered control output to the first buffered data input, or both.
Advantageously, the buffering is associated to executing a conversion between a
digital full swing internal signal and an analog low swing external signal with
respect to core circuitry of the digital circuitry.
