A queue is provided on a memory shared accessed by both a writing processor and a reading processor. This queue comprises a plurality of elements and an empty element are linked together. The element is composed of a communication information area and a mark area. The element is a memory area of a 1-access unit where writing and reading are possible with one access. The writing processor writes communication information, connection information showing connection states between the elements and information relating to registering/non-registering of the communication information into the empty element with one access. The reading processor reads the communication information, the connection information and the information relating to registering/non-registering with one access. As a result, it is not necessary to put exclusive lock on the queue.

 
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