A ferroelectric-type nonvolatile semiconductor memory comprising a plurality of bit lines and a plurality of memory cells,

• each memory cell comprising a first electrode, a ferroelectric layer formed at least on said first electrode and a second electrode formed on said ferroelectric layer,
• a plurality of the memory cells belonging to one of two or more thermal history groups having different thermal histories with regard to their production processes,
• data of 1 bit being to be stored in one of memory cells forming a pair, another data of 1 bit being to be stored in the other of said memory cells, a pair of said memory cells being connected to a pair of the bit lines,
• a pair of the bit lines being connected to a differential sense amplifier,
• wherein, when data stored in one of said memory cells forming a pair is read out, a reference potential is provided to the bit line connected to the other of said memory cells,
• when another data stored in the other of said memory cells is read out, a reference potential is provided to the bit line connected to the one of said memory cells, and
• a reference potential of the same level is provided to the bit lines connected to the memory cells belonging to the same thermal history group, and reference potentials of different levels are provided to the bit lines connected to the memory cells belonging to the different thermal history groups.