A dynamic random access memory (DRAM) has a refresh-control function under control by an internal refresh-control signal. The DRAM includes: a cell array having a plurality of DRAM cells divided into a plurality of blocks, the DRAM cells being driven through word lines for data transfer with bit lines; a decoder to select word lines and bit lines connected to the cell array; a sense amplifier to amplify data on the bit lines; and a refresh controller to limit refresh to the cell array so that at least one externally-accessed block cell among the blocks is refreshed.