A co-processor (also called "memory co-processor") provides an interface to a
memory,
by executing instructions on data held in the memory. The co-processor uses a specified
address to fetch data from memory, performs a specified instruction (such as incrementing
a counter or policing) on the data to obtain modified data, and writes the modified
data back to memory at the same address. Depending on the embodiment, the memory
co-processor may include a first buffer for holding instructions that may be received
back to back, in successive clock cycles. Instead of or in addition to the first
buffer, the memory co-processor may include a second buffer for holding data to
be written to memory back to back, in successive clock cycles. In some embodiments,
the memory co-processor also receives (and maintains in local storage) the identity
of a task that generates the specified instruction, so that the same cask may be
awakened after the instruction has been executed.