A semiconductor memory device includes a first reference circuit which generates a first reference potential, a second reference circuit which generates a second reference potential, a memory cell, a first sense amplifier which senses a data potential read from the memory cell through comparison with the first reference potential, and a second sense amplifier which senses the data potential read from the memory cell through comparison with the second reference potential, wherein the first sense amplifier and the second sense amplifier cooperate to determine whether the data potential is "0" or "1", the first reference potential being positioned on a highest potential side of a data potential distribution of a "0" data potential read from the memory cell, and the second reference potential being positioned on a lowest potential side of a data potential distribution of a "1" data potential read from the memory cell.