A first logical memory address identifies a first logical memory location that is outside of a logical buffer space. The first logical memory address is received and is translated into a second logical memory address that identifies a second logical memory location that is within the logical buffer space.

 
Web www.patentalert.com

< Systems and methods for memory read response latency detection

< Signal-processing based approach to translation of web pages into wireless pages

> Information retrieval system and a computer product

> Single instruction multiple data array cell

~ 00204