A resampling address generator updates period data in a resampling period address register when the periods of input and output clocks are not stable, and generates a read address by supplying the output of a register to an accumulative adder. When the periods of the input and output clocks are stable, and a command is internally or externally received, the resampling address generator stops updating of the period data in the register, and generates the read address by supplying the output of the register to the accumulative adder. When the updating of the period data in the register is stopped, and a phase difference detector finds that the phase difference between the write address and the read address is outside a predetermined allowable range, the data in the register is updated based on correction data, and the read address is generated by supplying the output of the register to the accumulative adder.