The invention provides an interface that can facilitate integration of user specific
proprietary cores and commercially available cores during customization of an FPGA-based
SoC. A selected hardware or software system component (380) used for customizing
the FPGA-based SoC can be configured (382) using parameters that can be
automatically propagated (384) and used to configure peer system components.
During configuration (388) of the peer system components, other parameters
used to configure those peer system components can also be propagated (400)
and used to configure other system components during customization of the FPGA-based SoC.